Intel's Core 2 architecture is based upon a 65 nanometer process. The first Intel CPU to use the 65 nm process was the Core mobile CPU released in the beginning of the year. Based upon the Pentium M architecture, the Core was faster in many respects than equivalent desktop CPUs in performance. There were two types of Core CPUs, Core Single and Core Duo, with the Core Duo being the world's first low-power Dual-Core CPU (25W). The Core 2 has 291 million transistors.
Core 2 is dual core architecture. That means there are two independent CPU cores on the same die. The first Intel dual core CPU was the Pentium D introduced in spring of 2005. Each core on the Core 2 has independent L1 caches. Early dual-core CPUs had independent L2 caches as well. Core 2 has a unified L2 cache of either 2MB or 4MB. That means when data is required on both cores only one set of data need be passed instead of two on two separate L2 caches.
Core 2 supports all current instruction sets, including the x86 instruction set, the Multimedia eXtensions introduced with the Pentium MMX CPU. Streaming SIMD instructions were introduced with the Pentium 3 CPU. The Core 2 architecture supports SSE2, SSE3 and there are 16 new CPU instructions called SSE4. Intel has also included a new feature called Media Boost which increases the number of 128-bit instructions to one per clock cycle, before it was 2 clock cycles for each 128-bit multimedia instruction. Also supported is Intel's Extended Memory 64 Technology, 64-bit instructions that are equivalent to AMD's instruction set.
Core 2 is dual core architecture. That means there are two independent CPU cores on the same die. The first Intel dual core CPU was the Pentium D introduced in spring of 2005. Each core on the Core 2 has independent L1 caches. Early dual-core CPUs had independent L2 caches as well. Core 2 has a unified L2 cache of either 2MB or 4MB. That means when data is required on both cores only one set of data need be passed instead of two on two separate L2 caches.
Core 2 supports all current instruction sets, including the x86 instruction set, the Multimedia eXtensions introduced with the Pentium MMX CPU. Streaming SIMD instructions were introduced with the Pentium 3 CPU. The Core 2 architecture supports SSE2, SSE3 and there are 16 new CPU instructions called SSE4. Intel has also included a new feature called Media Boost which increases the number of 128-bit instructions to one per clock cycle, before it was 2 clock cycles for each 128-bit multimedia instruction. Also supported is Intel's Extended Memory 64 Technology, 64-bit instructions that are equivalent to AMD's instruction set.
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